The present invention relates to a cell delay addition circuit for use in a communication apparatus or the like for an asynchronous transfer mode (hereinafter abbreviated as ATM).
At the present time, ATM is to be adopted as a communication system of the broad band ISDN (Integrated Services Digital Network). In the ATM network, delay and fluctuation thereof occur in propagation of cells. A communication apparatus for ATM must be designed in consideration of the delay and fluctuation thereof and an operation test thereof is required to be made in consideration of the delay and fluctuation. Accordingly, an estimation apparatus of the communication apparatus for ATM is required to give the delay and fluctuation to a cell as one of simulation functions of the ATM network.
However, since ATM itself is a novel technique, a circuit having such a function is not used heretofore.